Two common operand formats as established by IEEE are known as single precision data and double precision data formats. As established by the IEEE P754 binary floating point arithmetic standard, single precision floating point data comprises a mantissa portion, an exponent portion and a sign bit portion. The mantissa portion represents a fraction F and is defined as comprising twenty-three bits plus an implied "1" bit for a total of twenty-four mantissa bits. The mantissa is thus represented as a value "1.F". The exponential portion in the single precision format comprises eight bits. Double precision floating point data also comprises a mantissa portion, an exponent portion and a sign bit portion. The mantissa portion of double precision data is defined as comprising fifty-two bits plus an implied "1" bit for a total of fifty-three bits. The exponential portion comprises eleven bits. Both data formats have a single bit for the sign bit.
Since both data formats are in common usage, processors must be able to operate with either format interchangeably. An example of a multiplier which is capable of multiplying both fixed point and floating point operands is disclosed in U.S. Pat. No. 4,594,679 by George et al. entitled "High Speed Hardware Multiplier For Fixed Floating Point Operands". For operands of thirty-two bits or more, previous multiplier/accumulator circuits require many machine clock cycles to accumulate a final product result.